Processor Basics – Structure and Function


  • • To explain the fundamental concepts and basic structure of a generic register- organised CPU (central processing unit) and stack-organised CPU.
  • • To study the main tasks of a CPU and the way it operates.
  • • To learn about a generic machine instruction set (instruction set of a generic CPU), including multimedia instruction set, and the constituent elements of a machine instruction, instruction format, and design criteria.
  • • To introduce the types of register-organised CPUs and their organisation.
  • • To study numerous addressing schemes and different types of addressing modes, their significance and implications in CPU design.
  • • To present a representative IA-32 instruction set processor (ISP) architecture with an overview of IA-64 architecture, including multimedia extension (MMX).
  • • To describe the different types of machine instructions, including MMXs and the related operations.
  • • To demonstrate a representative stack-organised processor architecture.


This chapter is aimed at explaining the fundamental aspects of the processing unit, commonly referred to as CPU (central processing unit), and sometimes is even called an instruction set processor (ISP), which performs data-processing operations and coordinates the activities of the other resources. However, the CPU is essentially built with three major parts. The Control unit supervises and monitors various elements of the system, including those of the CPU, to manage numerous functions and the operations. The arithmetic-logic unit (ALU) performs the simple logic and arithmetic functions required to execute the instructions. The register set usually stores intermediate data and thereby assists the execution of an instruction. The internal organisation of a CPU and how it performs a variety of functions while executing instructions of a program will now be explained in detail.

The basic design of the CPU primarily entails the various functions that the proposed CPU will offer. To realize each such function, some instructions (or simply an instruction) need to be executed. The set of all such instructions thus required to obtain each and every predefined function of the CPU is called the machine instruction set. A description of a computer's machine instruction set thus provides a strong basis for explaining its CPU structure, architecture, and organisation as well as its functions. We will now examine the usual formats of generic machine instructions, the various types of operands associated with different types of operations that may be specified by machine instructions, as well as how to specify and include these operands and operations in machine instructions. With a rapid development in the field of electronics, the architecture and organisation of processors have, however, continuously evolved over the years aiming towards a gradual increase in performance that eventually led to the introduction of pipelined organisation and subsequently superscalar architecture of the CPU for even more increased performance. Both pipeline organisation and superscalar architecture of CPUs will be discussed separately in Chapter 8. This chapter is dedicated mainly towards explaining the structure, function, and the basic principles involved in designing a conventional CPU, which are mostly common to all types of processors.

Processor (CPU) Organisation

A computer is used to solve users' problems submitted in the form of a program consisting of high-level instructions which are first converted into the machine language of computer's primitive instructions, and then these machine language instructions are directly executed by the electronic circuits built in the form of numerous digital systems. The design of these machine instructions (to be as simple as possible and totally fulfil the performance requirements of the computer) and the respective electronic arrangements to execute these instructions are of primary importance and constitute the decisive factors while framing the architecture and organisation of the computer system and of CPU to be realized. To understand the organisation of the CPU, let us first consider the requirements that are associated with the CPU.

Fundamental Concepts

The primary and ultimate function of the CPU and other ISPs is to do the actual work by executing the set of instructions (programs) which are either available in an external main memory or stored in an external secondary memory. These instructions are brought into the main memory at the time of execution. The responsibilities that the CPU must perform to execute the stored set of instructions (programs) one after another are as follows:

  • Fetch instructions: The CPU must read instructions from memory one at a time.
  • Decode instructions: The instruction thus fetched must be interpreted to determine what action is required and that action is then to be taken.
  • Fetch data: The execution of an instruction may require operands that are read as data from memory or from an I/O module.
  • Execute instructions: The instruction is then executed; it may require performing some arithmetic or logical operations on data. This execution may often involve several operations, which mostly depends on the nature of the instruction being executed.
  • Write data: The results of an instruction execution may require data to be written to a targeted memory location or to an I/O module.

Figure 3.1 shows a simplified view of the CPU, indicating its connection to the rest of the system via the system bus. The major components of the CPU are as follows.

The control unit is responsible for fetching instructions and data from main memory and decoding the instructions (analyse to determine their types). The control unit also supervises, monitors, and controls the movements of data and instructions into and out of the CPU and also controls the operation of CPU. The ALU performs numerous operations (such as additions, Boolean, etc.) needed to execute the instructions. The CPU also contains a small, high-speed memory used to temporarily store data, intermediate results, and certain control information. This memory comprises a number of registers, each of which has certain predefined functions.

The number of registers present in a CPU, together with its internal organisation, plays a critical role in the organisation of the CPU and also influences the corresponding machine instruction set design. This instruction set thus available in a CPU determines to a large extent the performance and the versatility of a CPU. The usual trade-off is, of course, cost


Schematic diagram of CPU with system bus.

versus speed. Among many other important factors that can influence the speed of the CPU, one is, of course, how many registers are present within the CPU. Based on the number of hardware registers available in a CPU, most computers fall into one of three types of CPU organisations:

  • 1. Accumulator-based CPU (single accumulator organisation);
  • 2. General-register organisation CPU (multiple registers);
  • 3. The stack-organised CPU.

Each of these three organisations (described separately in the subsequent sections) gives rise to a totally different approach in CPU design with its own merits and drawbacks, mostly depending on the environment and the applications where it would be used. It is, after all, the prerogative of the designer to select a particular design approach taking into account the trade-off criteria and the ultimate target that the machine should meet. While the design approaches as mentioned in (1) and (2) follow the Von Neumann design concept, the design approach as mentioned in (3) is a total departure from this fundamental design concept and is called a non-Von Neumann machine. The most interesting feature is that in spite of having a strong demarcation line in these various types of CPU organisations, some computers combine or can combine features from more than one organisational structure mentioned above, to achieve their specific design target. The earlier Intel 8085 processor is an example of such an organisation.

Register Organisation

Within the CPU, there is a set of registers (both hardware and software) that support CPU operations while the CPU executes instructions. These registers operate as the fastest memory internal to the CPU. Different machines have different number of registers and various types of register organisations, which play a decisive role in the design of the CPU and its organisation. However, the registers that are usually present in the CPU fall into two broad categories, which are described below.

User-Accessible Registers

Most contemporary CPU designs include a number of such registers. They are used by the machine language or by system programmers (assembly language programmer) for various purposes, and also temporarily hold data to minimize the frequently CPU visits to slower main memory, thereby accelerating the execution speed. These registers, however, are not found in single accumulator-based CPUs. All these registers can again be broadly classified into the following categories, based on their numerous usage:

i. General-purpose registers;

ii. Address registers;

iii. Data registers;

iv. Condition code registers.

Several design issues and alternative approaches have, however, been observed in relation to the classification and categorization of these registers and their specific usage, although each one has its own merits and drawbacks and there is, as such, no specific rule or perfect and complete solutions to these design issues. However, the modern trend is observed to be tilted in favour of using specialized registers. A new approach that finds advantages in the use of more registers (to the tune of hundreds or so) is implemented in some RISC (reduced instruction set computer) systems (discussed separately in Chapter 9). Incidentally, many processors, including those from Intel, do not use condition codes at all. Instead, they use conditional branch instructions that indicate a specific comparison to be made, and act accordingly on the outcome of the comparison. Besides, they use some other mechanisms that serve, equally well, the purpose that condition codes provide. Thus, they find no need to use any such condition codes (registers).

The details of the functions and the responsibilities that are carried out by each of these registers are given in the website:

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