Input–Output Organisation

LEARNING OBJECTIVES

  • • To provide an overview of the principles of input-output (I/O) system organisation and the related design of I/O modules.
  • • To enable a clear understanding of interrupts and their types, and the hardware and software needed to support them.
  • • To detail the different types of I/O operations, including direct memory access (DMA) for high-speed devices and I/O processors (IOPs) for large systems.
  • • To facilitate an understanding of buses, their different types (PCI (peripheral component interconnect), SCSI (small computer system interface), USB (Universal Serial Bus)), and distinctive features along with the corresponding bus designs.
  • • To detail the features of FireWire, an advanced high-speed and high-performance serial bus for digital audio and video pieces of equipment.
  • • To introduce the reader to InfiniBand, an advanced high-speed communication link for modern distributed systems, cluster architectures, and high-end servers.
  • • To discuss ports and their different types, including serial, parallel, and USB ports.

The synergy between computers and communications is at the heart of today's information technology revolution. Apart from the CPU (central processing unit) and a variety of memories constituting the internal memory system, the third key resource of a modern computer system is a set of various I/O modules attached with numerous peripheral devices that can now be interfaced to the system bus or central control to communicate with the main system for migration of information from the outside world into the computer or from the computer to the outside world. Besides, most computers also have a wired or wireless I/O connection to the Internet to communicate with the external world. Thus, I/O modules, on the one hand, work in tune with the CPU and main memory, and on the other hand, they establish a connection with the external peripheral devices (mostly electro-mechanical) to execute physical I/O operations. The continuous development in the design of I/O modules and its allied interfaces makes it more and more intelligent, and consequently enhances the performance of the computer system to which it is attached. Large computer systems nowadays have such powerful I/O modules that an I/O module can be itself treated as a stand-alone full-fledged computer system. This chapter presents an overview of the I/O organisation detailing different types of I/O modules and their interfaces with the main computer systems, including the buses and ports, and their structures and functions, and above all, the mechanisms employed to control these devices to achieve certain predefined goals.

FIGURE 5.1

Block diagram of an external device along with its I/O interface.

Input–Output System

The I/O system performs the task of transferring information between main memory or the CPU and the outside world. Figure 5.1 shows a model of an I/O system, which includes an I/O module that works as a mediator to communicate between the high-speed CPU or memory and the much slow-speed electro-mechanical devices of different types connected by the well-defined links (buses). This link is used to communicate control, status, and physical data between the I/O modules and the external devices, as shown in Figure 5.1, for realizing desired I/O operation. Each of these different types of devices as connected with the system must have a control logic of its own that will manage the operation of the device as directed by the I/O module. The device should also have necessary electronic circuits in the form of a transducer to convert the I/O data into appropriate forms for execution. Usually, a small buffer is associated with the transducer to temporarily hold the data during the data transfer operation to support smooth coordination between the slower I/O devices and the relatively faster memory or CPU.

Nowadays, the I/O organisation is considered as one of the key parameters to characterize a particular generation of computers, which in turn determines the class and category of the computer and the devices attached to it. In fact, the differences between a small (micro, mini) and a large (supermini, mainframe, supercomputer) system, besides other characteristics, mostly depend on the capability and capacity of its attached I/O module, the amount of hardware available to communicate with its peripherals, and also the number of peripherals that could be hooked up with it.

I/O Module: I/O Interface

The primary responsibility of the I/O module and its associated interfaces is to resolve the differences (mainly due to the devices with various characteristics having different types of operations with numerous data formats and codes along with the different disparities in the data transfer rate with the CPU and memory) that exist between the central computer system and the different types of peripheral devices attached with it. To perform the responsibilities as described, a set of useful functions is executed by the I/O module (I/O interface) at the time of data transfer that are two fold in nature: CPU-I/O module handshaking and I/O module device negotiation. CPU-I/O communication is mostly carried out via memory which is located centrally (Figure 5.1), supporting the CPU, on the one hand, and communicating with the I/O module, on the other hand. Fundamentally, there exist many different methods, consisting of various arrangements of different sets of lines (buses) that connect the I/O modules with the memory in a system. Of course, each of these methods has its own performance merits and drawbacks, and the related cost implications also vary over a wide range.

A brief detail of I/O module, its different functions, and its communication with memory is given in the website: http://routledge.com/9780367255732.

I/O Module Design

The ultimate target of I/O module design is to what extent it can relieve and release the CPU from the tedious burden of I/O activities (non-intelligent activity), and hence, this design varies considerably depending on the amount of intelligence to be injected into an I/O module so that how much burden of an entire I/O operation it can bear independently using the different types of external peripherals attached with it. The I/O logic within this module interacts with the CPU (or rest of the computer system) hiding the details of the devices via a set of control lines (e.g. system bus lines), as shown in Figure 5.2. These lines are also used by the CPU to communicate with I/O modules in the form of issuing commands. Other control lines attached with the I/O logic are used to control and drive the peripherals. In addition, every I/O module is also equipped with a set of addresses; each address in the set is the address (identification) of the peripheral attached to the module.

FIGURE 5.2

Schematic I/O module between CPU (rest of the system) and devices.

If an I/O module is quite primitive and needs a detailed control from the CPU during I/O operation, this type of I/O module is usually referred to as an I/O controller or device controller, which again may be of various types depending on their intelligence and capabilities, and to the extent they require assistance from the CPU and its involvement in the execution of I/O operation. If the I/O module is equipped to handle most of the detailed I/O processing burdens on its own setting the CPU aside, relieving the CPU totally from the headache of I/O operations, presenting to the CPU a high-level interface, then this type of I/O module is generally referred to as an I/O channel or I/O processor.

A brief detail of I/O module design is given in the website: http://routledge. com/9780367255732.

Types of I/O Operations: Definitions and Differences

I/O organisations (I/O systems) are usually distinguished by the extent to which the CPU is involved in the execution of I/O operations and is relieved from I/O activities. The CPU merely executes the I/O instructions and may accept the data temporarily, but the ultimate transfer of information to and from external devices involves the memory unit. That is why, the data transfer between the central computer and I/O devices may be handled in a variety of ways, mainly, either between an I/O device and the CPU or between an I/O device and main memory. This gives rise to four different I/O schemes, which are in current use:

A. Programmed I/O (PIO);

B. Interrupt-driven I/O;

C. DMA;

and, the ultimate target is to find out a technique to completely free the CPU from any involvement in I/O operations with the introduction of

D. IOP or I/O channel.

Programmed I/O (Using Buffer)

If I/O operations are completely controlled by the CPU (i.e. the CPU executes the programs that initiate, direct, and terminate the I/O operations), the computer is said to be using PIO. Here, data is exchanged directly between the CPU and the I/O module using the accumulator, and the buffer register is connected to the selected I/O device. The CPU is totally involved in this I/O activity, thus initiating, controlling, and executing entire I/O operations (excluding the physical read/write from and to devices), including memory interactions till the entire I/O completion. This, however, causes a huge waste (unproductive) of costly CPU time. Each I/O device connected to the system via I/O modules has a unique address or identifier which CPU uses when it issues an I/O command. Each I/O module must then interpret the address lines to determine whether the command is for itself. Under this scheme, I/O devices, main memory, and the CPU are normally connected via a common shared bus (system bus). This gives rise to the possibility of two modes of I/O addressing: (i) memory-mapped I/O and (ii) I/O-mapped I/O (isolated I/O). In memory- mapped I/O, the address line of the system bus that is used to select main memory locations can also be used to select I/O devices. Each junction between the system bus and I/O device is called an I/O port and is assigned a unique address. The I/O port includes a data buffer register, which is here a part of main memory address space (Motorola 68000 series). That is why, it is called memory-mapped I/O. A memory reference instruction that causes data to be fetched from or stored at address X automatically becomes an I/O instruction if X indicates the address of an I/O port. For most CPUs of this type, a relatively large set of different instructions is available for referencing memory. An advantage of memory-mapped I/O is that this large repertoire of instructions can also be used for I/O activities, thereby enabling more efficient programming. The second strategy in organisation is sometimes called I/O-mapped I/O (or isolated I/O), where the memory and I/O address space are kept totally separate. Here, the I/O port includes a data buffer register which is associated with the I/O module (devices), and memory reference instructions do not affect the I/O devices, but separate I/O instructions are required to activate the I/O. Consequently, an I/O device and a main memory location may have the same address. If I/O-mapped I/O (isolated I/O) strategy is used, there are only a few I/O instructions. This scheme is used in INTEL 8085 (using 8255A chip) and 8086 series of processors.

More details of PIO, and a comparison between the two modes, are given in the website: http://routledge.com/9780367255732.

 
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