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Home arrow Computer Science arrow Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environment

Hardware Security and Trust: Design and Deployment of Integrated Circuits in a Threatened Environmen


AES Datapaths on FPGAs: A State of the Art AnalysisIntroductionThe AES AlgorithmSubBytes OperationShiftRows OperationMixColumns OperationKey SchedulingFPGA Techniques for the AES OperationsDatapath Width(Inv)ShiftRows Implementations: Routing, Multiplexing, and Memory Based(Inv)SubBytes Implementations: Logic Versus MemoryImplementing the MixColumns: LogicImplementing the InvMixColumns: LogicImplementing the (Inv)MixColumns: MemoryLast AES RoundTypes of Key SchedulingFPGA Architectures for AESRolled Versus Unrolled RoundsIntra Versus Inter-PipelineState of the Art MetricsConclusionReferencesFault Attacks, Injection Techniques and Tools for SimulationIntroductionFault Injection TechniquesFault Injection Through Power SupplyFault Injection Through ClockFault Injection Through TemperatureFault Injection Through LightFault Injection Through Electromagnetic FieldsFault Injection Through Focused Ion BeamsComparison of Fault Injection TechniquesFault AttacksAlgorithm Specific AttacksDifferential Fault AnalysisTampering with the Program FlowFault Injection Simulators and Their Applicability to Fault AttacksWeaknesses Identification with Static AnalysisHigh-Level Simulation with Complex Fault ModelsLow-Level Virtual Machine SimulationTransistor Level SimulationEmulationConclusionsReferencesRecent Developments in Side-Channel Analysis on Elliptic Curve Cryptography ImplementationsIntroductionElliptic Curve CryptographyCoordinate SystemsForms of Elliptic CurvesScalar Multiplication AlgorithmsLeft-to-Right Double-and-Add-Always AlgorithmRight-to-Left Double-and-Add-Always AlgorithmMontgomery LadderSide-Channel AtomicitySide-Channel Attacks on ECCCollision-Correlation AttacksHorizontal Attacks and VariantsTemplate AttacksCommon DistinguishersA Special Case: Online Template AttacksCountermeasuresRandomization CountermeasuresOTA CountermeasuresReferencesPractical Session: Differential Power Analysis for BeginnersIntroductionDifferential Power Analysis—Key RecoveryMethodSchedule of Your WorkTraining SetsToolsDPA—Measurement with an OscilloscopePreparation of the MeasurementCompilation of Program for MeasurementReferencesFault and Power Analysis Attack Protection Techniques for Standardized Public Key CryptosystemsIntroductionPublic Key Primitive Fault and Power Attacks and CountermeasuresSide Channel Attacks and CountermeasuresFault Attack and CountermeasuresProposed ApproachSecurity AnalysisConclusionReferencesScan Design: Basics, Advancements, and VulnerabilitiesIntroductionDfTScan DesignBoundary ScanScan-Based Side-Channel AttackAttack PrincipleAdvanced Encryption Standard (AES)Traditional Scan AttackTest-Mode-Only Scan AttackSummaryReferencesManufacturing Testing and Security CountermeasuresIntroductionCountermeasures to Scan-Based AttacksBuilt-In Self-TestBISTed Cryptographic CoresBuilt-In Test ComparisonSecure Test Access MechanismIndustrial SolutionsStandard DfT WeaknessesSecure DfT and Industrial constraintsIndustrial-Constraint-Aware Secure DfTRAM/ROMTestConclusionsReferencesMalware Threats and Solutions for Trustworthy Mobile Systems DesignIntroductionThreats in Mobile DevicesMalware Detection SolutionsSignature-Based DetectionStatic DetectionDynamic DetectionDiscussionType of AnalysisType of ThreatsDetection TechniquesOperating SystemOn Device Versus on Cloud DetectionDatasetsOverheadConclusionsReferencesRing Oscillators and Hardware Trojan DetectionIntroductionTrojans and Trojan Detection TechniquesTrojan CharacteristicsTrojan TaxonomiesDetection TechniquesTrojan Detection in True Random Number GeneratorsTRNG DesignTrojan CharacteristicsFeasibility of a T4RNGTransient-Effect Ring Oscillators for Hardware Trojan DetectionExperimental SetupExperimentsResults and DiscussionConclusions and Outlook to the FutureReferences Notions on Silicon Physically Unclonable FunctionsIntroductionA Formal Perspective on PUFUnclonabilityUniquenessUnpredictabilityOne-Way PropertyFeasibilityTamper-EvidentQuality Measurement on Silicon PUFsUniquenessReliabilityUniformityBit AliasingCategories of PUFsDelay-Based PUFMemory-Based PUFPost-Processing TechniquesMajority VoterFuzzy ExtractorAttacks Against PUFModel Based AttackSide-Channel AttackConclusionReferencesImplementation of Delay-Based PUFs on Altera FPGAsIntroductionAltera FPGA ArchitectureImplementing the PUFDefining the Hardware ComponentsDefining the LUT PlacementDefining the LUT RoutingCommunication Between PC and FPGATraps and PitfallsConclusionReferencesImplementation and Analysis of Ring Oscillator Circuits on Xilinx FPGAsIntroductionXilinx FPGA FabricRO Frequencies CharacterizationRO Structure and Measurement ArchitectureResult and ValidationAnalysis of the Logic Surrounding the ROAnalysis of the Stages Number and RoutingTemperature AnalysisAging AnalysisConclusionReferences
 
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