CMOS Devices
An attractive alternative to the CCD readout is coordinative addressing with CMOS switches. In particular, silicon fabrication advances now permit the implementation of CMOS transistor structures that are considerably smaller than the wavelength of visible light and which have enabled the practical integration of multiple transistors within a single pixel. The configuration of CCD devices requires specialized processing, unlike CMOS imagers, which can be built on fabrication lines designed for commercial microprocessors. CMOS have the advantage that existing foundries, intended for application to specific integrated circuits (ASICs), can be readily used by adapting their design rules. Design rules of 7-nm are currently in production, with pre-production runs of 5-nm design rules. As a result of such fine design rules, more functionality has been designed into the unit cells of multiplexers with smaller unit cells, leading to large array sizes. Figure 4.2 shows the timelines for minimum circuit features and the resulting CCD, IR FPA, and CMOS visible imager sizes with respect to the number of imaging pixels. Along the horizontal axis is also a scale depicting the general availability of various MOS and CMOS processes. The ongoing migration to even finer lithography will thus enable the rapid development of CMOS-based imagers having even greater resolution, better image quality higher levels of integration, and lower overall imaging system cost than CCD-based solutions. At present, CMOS, with minimum features of <0.1-|am, makes monolithic visible CMOS imagers possible, because the denser photolithography allows for low-noise signal extraction and high-performance detection with high optical fill-factor within each pixel. The pixels architecture is changed to improve resolution by shrinking the pixel size. Figure 4.8 is a roadmap of where CMOS pixel pitch became smaller than CCD due to the described technological developments in 2010 [23]. CMOS imagers are also moving rapidly to large formats and, at present, compete with CCDs for the large- format applications. The silicon wafer production infrastructure, which has put high-performance personal computers into many homes, makes CMOS-based imaging in consumer products, such as video and digital still cameras, widely available.
A typical CMOS multiplexer architecture [Fig. 4.6(b)] consists of fast (column) and slow (row) shift registers at the edges of the active area, and pixels are addressed, one by one, through the selection of a slow register, whereas the fast register scans through a column, and so on. Each imagesensor is connected in parallel to a storage capacitor located in the unit cell. A column of diodes and storage capacitors is selected, one at a time, by a digital horizontal scan register and a row bus is selected by the vertical scan register. Therefore, each pixel can be individually addressed.
CMOS-based imagers use active and passive pixels [13,17] as shown, in simplified form, in Fig. 4.5(b). In comparison with passive pixel sensors (PPSs), active pixel sensors (APSs), apart from read functions, exploit some form of amplification at each pixel. The PPS consists of three transistors: a reset FET, a selective switch, and a source follower (SF) for driving the signal
FIGURE 4.8 A roadmap of CMOS pixel pitch development.
onto the column bus. As a result, circuit overhead is low and the optical collection efficiency [fill factor (FF)] is high, even for a monolithic device. Micro-lenses, typically used in CCD and CMOS APS imagers for visible application, concentrate the incoming light into the photosensitive region, where they are accurately deposited over each pixel (Fig. 4.9). In the case of the per-pixel electronics, the area available in the pixel for the detector is reduced, so FF is often limited to 30 to 60 percent. When the FF is low and micro-lenses are not used, the light falling elsewhere is either lost or, in some cases, creates artifacts in the imagery by generating electrical currents in the active circuitry. Unfortunately, micro-lenses are less effective when used in low//# imaging systems, and may not be appropriate for all applications.
Although a micro-lens improves the pixel sensitivity, there are many design challenges associated with the application of micron-scale lens arrays. One key issue is crosstalk, which degrades spatial resolution, color separation, and overall sensitivity. Reducing crosstalk in small pixels has become one of the most difficult and time-consuming tasks in sensor design. At pixel dimensions below 1 pm, it becomes more difficult in the frontside metallization of a CMOS sensor, and advanced light-guiding structures need to be used to reduce crosstalk.
In the APS, three of the metal-oxide-semiconductor field-effect transistors (MOSFETs) have the same function as in PPS. The fourth transistor works as a transfer gate that moves charge from the photodiode to the floating diffusion. Usually, both pixels operate in rolling shutter mode. The APS is capable of performing correlated double sampling (CDS) to eliminate the reset noise (kTC noise) and the pixel offsets. The PPS can only be used with noncorre- lated double sampling, which is sufficient to reduce the pixel-to-pixel offsets, but does not eliminate the temporal noise (temporal noise can be addressed by other methods). Adding additional components (like soft reset or tapered
FIGURE 4.9 Micrograph and cross-sectional drawing of micro-lensed FPA.
reset) however, reduces the FF of monolithic imagers [21]. The MOSFETs incorporated in each pixel for readout are optically dead. CMOS sensors also require several metal layers to interconnect MOSFETs. The buses are stacked and interleaved above the pixel, producing an “optical tunnel” through which incoming photons must pass. In addition, most CMOS imagers are frontside illuminated. This limits the visible sensitivity in the red because of a relatively shallow absorption material. In comparison, CCD pixels are constructed so that the entire pixel is sensitive, with a 100% FF.
Figure 4.10 compares the principles of CCD and CMOS sensors. Both detector technologies use a photosensor to generate and separate the
FIGURE 4.10 Comparison between the CCD-based and CMOS-based image sensor approaches.
charges in the pixel. Beyond that, however, the two sensor schemes differ significantly. During CCD readout, the collected charge is shifted from pixel to pixel all the way to the perimeter. Finally, all charges are sequentially pushed to one common location (floating diffusion), and a single amplifier generates the corresponding output voltages. On the other hand, CMOS detectors have an independent amplifier in each pixel (APS). The amplifier converts the integrated charge into a voltage and thus eliminates the need to transfer charge from pixel to pixel. The voltages are multiplexed onto a common bus line, using integrated CMOS switches. Analog and digital sensor outputs are possible by implementing either a video output amplifier or an analog-to-digital (A/D) converter on the chip.
The processing technology for CMOS is typically two to three times less complex than standard CCD technology. In comparison with CCDs, the CMOS multiplexers exhibit important advantages due to high circuit density, fewer drive voltages, fewer clocks, much lower voltages (low power consumption), and packing density compatible with many more special functions, and lower cost for both digital video and still camera applications. The minimum theoretical read noise of a CCD is limited in large imagers by the output amplifier’s thermal noise after CDS is applied in off-chip support circuits. The alternative CMOS paradigm offers lower temporal noise because the relevant noise bandwidth is fundamentally several orders of magnitude smaller and better matches the signal bandwidth. Whereas CCD sensitivity is constrained by the limited design space involving the sense node and the output buffer, CMOS sensitivity is limited by only the desired dynamic range and operating voltage. CMOS-based imagers also offer practical advantages with respect to on-chip integration of camera functions, including command and control electronics, digitization, and image processing. CMOS is now suitable also for TDI-type multiplexers because of the availability from foundries of design rules lower than l.O-pm, more uniform electrical characteristics, and lower noise figures.
